# NPTEL Computer Architecture Assignment 6 Answers 2022

Are you looking for the Answers to NPTEL Computer Architecture Assignment 6? This article will help you with the answer to the National Programme on Technology Enhanced Learning (NPTEL) Course “NPTEL Computer Architecture Assignment 6″

## What is Computer Architecture?

This is an introductory computer Architecturecourse for beginners. We will start out with a discussion on binary representations, and a discussion on number systems (1’s complement and 2’s complement). Then, the course will move on to discuss assembly languages and computer arithmetic. Once, we are done with the fundamentals, we shall look at the design of a simple processor, concepts of pipelining, and the design of a modern memory system.

## CRITERIA TO GET A CERTIFICATE

Average assignment score = 25% of the average of best 8 assignments out of the total 12 assignments given in the course.
Exam score = 75% of the proctored certification exam score out of 100

Final score = Average assignment score + Exam score

YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF THE AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75. If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.

Below you can find the answers for the NPTEL Computer Architecture Assignment 6

## NPTEL Computer Architecture Assignment 6 Answers:-

Q1. An n-type semiconductor has Group ____ impurities and a p-type semiconductor has Group ____ impurities.

Q2. An NMOS transistor consists of _____.

Q3. We require ____ transistors to construct a 2-input NAND gate using CMOS logic.

Q4. A master-slave D flip-flop uses ____ NAND gates and ____ inverter for the clock.

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Q5. An SRAM cell uses ___ transistors to save a single bit (0 or 1).

Q6. An encoder with n inputs has ____outputs.

Q7. In an inverter made using CMOS logic, when the input to the inverter is a logical 1, which of the following statements is true?

Q8. The pre-charging technique is used to speed up the ______ operation in an SRAM array.

Q9. A DRAM cell loses its charge with time. The _____ operation is used to solve this problem.

Q10. The current output of a negative edge-triggered JK flip-flop is Qn. If the input to the flip-flop changes to J = 1 and K = 1. What is the output of the flip-flop just after the next negative clock edge?

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