Are you looking for the Answers to NPTEL Computer Architecture Assignment 11? This article will help you with the answer to the National Programme on Technology Enhanced Learning (NPTEL) Course “NPTEL Computer Architecture Assignment 11″
What is Computer Architecture?
This is an introductory computer Architecturecourse for beginners. We will start out with a discussion on binary representations, and a discussion on number systems (1’s complement and 2’s complement). Then, the course will move on to discuss assembly languages and computer arithmetic. Once, we are done with the fundamentals, we shall look at the design of a simple processor, concepts of pipelining, and the design of a modern memory system.
CRITERIA TO GET A CERTIFICATE
Average assignment score = 25% of the average of best 8 assignments out of the total 12 assignments given in the course.
Exam score = 75% of the proctored certification exam score out of 100
Final score = Average assignment score + Exam score
YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF THE AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75. If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.
Below you can find the answers for the NPTEL Computer Architecture Assignment 11
| Assignment No. | Answers |
|---|---|
| Computer Architecture Assignment 1 | Click Here |
| Computer Architecture Assignment 2 | Click Here |
| Computer Architecture Assignment 3 | Click Here |
| Computer Architecture Assignment 4 | Click Here |
NPTEL Computer Architecture Assignment 11 Answers:-
Q1. The performance of a processor is inversely proportional to _______.
Answer:- b
Q2. Exceptions are generated when _____.
Answer:- d
Q3. In forwarding, if the instruction in the EX-stage is a load, and the instruction in the OF-stage uses its loaded value, then we need to stall for __ cycle(s).
Answer:- b
Q4.The ____ is responsible for identifying and removing the code that does not determine the final output of a program.
Answer:- c
Next Week Answers: Assignment
Q5. If we increase the latch delay in a pipeline, we should have ___ pipeline stages. Choose an appropriate answer.
Answer:- b
Q6. Consider a program that has 60% load instructions. The ideal CPI is 1 for the program and assume that 40% of the load instructions suffer from a load-use hazard, then the CPI is ____.
Answer:- c
Q7. User programs have the CPL bit set to ___.
Answer:- a
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Q8. The memory access latency of an application depends on the _____
Answer:- d
Q9. The ____ metric verifies if programs have temporal locality.
Answer:- c
Q10.We cannot create a memory of just SRAM cells because ___.
Answer:- d
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