NPTEL Advanced Computer Architecture Assignment 3 Answers 2023

NPTEL Advanced Computer Architecture Assignment 3 Answers 2023

NPTEL Advanced Computer Architecture Assignment 3 Answers 2023? This article will help you with the answer to the National Programme on Technology Enhanced Learning (NPTEL) Course “ Advanced Computer Architecture Assignment 3

Below you can find the answers for Advanced Computer Architecture Assignment 3 Answers 2023

NPTEL Advanced Computer Architecture Assignment 3 Answers 2023:-

Q1. Which of the following are the roles of the decode unit of the pipeline?

1)Expand the immediate values.
2) Compute the branch target if the branch is taken.
3) Compute the branch target if the branch is not taken.
4) Create the instruction packet.

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Q2. Most of the _____ processors internally convert instructions from the _____ format to the _____ format.

Answer:-

Q3. What are the advantages of adding the csp register and the stack pointer calculation logic in the decode stage of the processor pipeline? Choose the most appropriate option.

Answer:-

Q4. Which of the following techniques is not used to create reduced- width instructions?

Answer:-

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Q5. Which of these dependencies does register renaming remove?

Answer:-

Q6. In the rename stage , the _____ is used to translate the architectural register id to the physical register id, while the _____ maintains a list of unmapped physical registers.

Answer:-

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Q7. To handle a load- use hazard , we broadcast the tag _____ cycle(s) after the load instruction gets selected.

Answer:-

Q8. A producer instruction can let all its consumer instructions know that the value of its destination register is ready through the _____ mechanism.

Answer:-

Q9. Match the following.

Answer:-

Q10. Choose the option with the correct order of the different pipeline stages.

Answer:-

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